Finite difference schemes and partial differential equations
Finite difference schemes and partial differential equations
Power supply noise analysis methodology for deep-submicron VLSI chip design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power considerations in the design of the Alpha 21264 microprocessor
DAC '98 Proceedings of the 35th annual Design Automation Conference
Design and analysis of power distribution networks in PowerPC microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Analysis of performance impact caused by power supply noise in deep submicron devices
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hierarchical analysis of power distribution networks
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Power network analysis using an adaptive algebraic multigrid approach
Proceedings of the 40th annual Design Automation Conference
High level techniques for power-grid noise immunity
Proceedings of the 14th ACM Great Lakes symposium on VLSI
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
An unconditional stable general operator splitting method for transistor level transient analysis
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Relaxed hierarchical power/ground grid analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Defect Simulation Methodology for iDDT Testing
Journal of Electronic Testing: Theory and Applications
Accurate power grid analysis with behavioral transistor network modeling
Proceedings of the 2007 international symposium on Physical design
Large scale P/G grid transient simulation using hierarchical relaxed approach
Integration, the VLSI Journal
Statistical power supply dynamic noise prediction in hierarchical power grid and package networks
Integration, the VLSI Journal
| Hi-index | 0.00 |
The soaring clocking frequency and integration density demand robust and stable power delivery to support tens of millions of transistors switching. To ensure the design quality of power delivery, extensive transient power grid simulations need to be performed during design process. However, the traditional circuit simulation engines are not scaled as well as the complexity of power delivery, as a result, it often takes a long runtime and huge memory requirement to simulate a medium size power grid circuit. In this paper, we develop and present a new efficient transient simulation algorithm for power distribution. The proposed algorithm, TLM-ADI (Transmission-Line-Modeling Alternating-Direction-Implicit), first models the power delivery structure as transmission line mesh structure, then solves the transient MNA matrices by the alternating-direction-implicit method. The proposed algorithm, with linear runtime and memory requirement, is also unconditionally stable which ensures that the time-step is not limited by any stability requirement. Extensive experimental results show that the proposed algorithm is not only orders of magnitude faster than SPICE but also extremely memory saving and accurate.