Statistical failure analysis of system timing
IBM Journal of Research and Development
Statistical delay modeling in logic design and synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Generation of High Quality Tests for Robustly Untestable Path Delay Faults
IEEE Transactions on Computers
Hierarchical algorithms for assessing probabilistic constraints on system performance
DAC '98 Proceedings of the 35th annual Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Power supply design parameters prediction for high performance IC design flows
SLIP '00 Proceedings of the 2000 international workshop on System-level interconnect prediction
Proceedings of the 37th Annual Design Automation Conference
Hierarchical power supply noise evaluation for early power grid design prediction
Proceedings of the 2001 international workshop on System-level interconnect prediction
Modeling and forecasting of manufacturing variations (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Static timing analysis including power supply noise effect on propagation delay in VLSI circuits
Proceedings of the 38th annual Design Automation Conference
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Worst case clock skew under power supply variations
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Power Supply Design Parameters for Switching-Noise Control in Deep-Submicron Circuits Design Flows
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Delay Testing Considering Crosstalk-Induced Effects
ITC '01 Proceedings of the 2001 IEEE International Test Conference
RC Power Bus Maximum Voltage Drop in Digital VLSI Circuits
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Dynamic Timing Analysis Considering Power Supply Noise Effects
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Power Bus Maximum Voltage Drop in Digital VLSI Circuits
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Energy-reliability trade-off for NoCs
Networks on chip
Delay Testing Considering Power Supply Noise Effects
ITC '99 Proceedings of the 1999 IEEE International Test Conference
High level techniques for power-grid noise immunity
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Vectorless Analysis of Supply Noise Induced Delay Variation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fast algorithms for IR drop analysis in large power grid
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Modeling Power Supply Noise in Delay Testing
IEEE Design & Test
Proceedings of the 2008 international symposium on Physical design
Statistical power supply dynamic noise prediction in hierarchical power grid and package networks
Integration, the VLSI Journal
Context-sensitive static transistor-level IR analysis
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Worst-case performance prediction under supply voltage and temperature variation
Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction
Proceedings of the Conference on Design, Automation and Test in Europe
A scalable quantitative measure of IR-drop effects for scan pattern generation
Proceedings of the International Conference on Computer-Aided Design
Power supply selective mapping for accurate timing analysis
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Deterministic random walk preconditioning for power grid analysis
Proceedings of the International Conference on Computer-Aided Design
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