Power considerations in the design of the Alpha 21264 microprocessor
DAC '98 Proceedings of the 35th annual Design Automation Conference
Design and analysis of power distribution networks in PowerPC microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Full-chip verification methods for DSM power distribution systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Analysis of performance impact caused by power supply noise in deep submicron devices
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hierarchical power supply noise evaluation for early power grid design prediction
Proceedings of the 2001 international workshop on System-level interconnect prediction
Modeling and forecasting of manufacturing variations (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Technology trends in power-grid-induced noise
SLIP '02 Proceedings of the 2002 international workshop on System-level interconnect prediction
An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts
Proceedings of the 2002 international symposium on Physical design
Congestion-driven codesign of power and signal networks
Proceedings of the 39th annual Design Automation Conference
Modeling and analysis of regular symmetrically structured power/ground distribution networks
Proceedings of the 39th annual Design Automation Conference
Power Supply Design Parameters for Switching-Noise Control in Deep-Submicron Circuits Design Flows
Analog Integrated Circuits and Signal Processing
Frequency domain analysis of switching noise on power supply network
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Multigrid-like technique for power grid analysis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Challenges in power-ground integrity
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Impact of Technology in Power-Grid-Induced Noise
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Managing power and performance for System-on-Chip designs using Voltage Islands
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Power network analysis using an adaptive algebraic multigrid approach
Proceedings of the 40th annual Design Automation Conference
Power grid reduction based on algebraic multigrid principles
Proceedings of the 40th annual Design Automation Conference
On-chip power supply network optimization using multigrid-based technique
Proceedings of the 40th annual Design Automation Conference
Timing Yield Estimation from Static Timing Analysis
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Journal of Electronic Testing: Theory and Applications
Clock network sizing via sequential linear programming with time-domain analysis
Proceedings of the 2004 international symposium on Physical design
Fault Simulation Model for i{DDT} Testing: An Investigation
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
A stochastic approach To power grid analysis
Proceedings of the 41st annual Design Automation Conference
Vectorless Analysis of Supply Noise Induced Delay Variation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Power/Ground Mesh Area Optimization Using Multigrid-Based Technique
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Stochastic Power Grid Analysis Considering Process Variations
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI
Analog Integrated Circuits and Signal Processing
Proceedings of the 42nd annual Design Automation Conference
Supply Voltage Degradation Aware Analytical Placement
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
RCLK-VJ network reduction with Hurwitz polynomial approximation
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Relaxed hierarchical power/ground grid analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Localized On-Chip Power Delivery Network Optimization via Sequence of Linear Programming
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
SMM: Scalable Analysis of Power Delivery Networks by Stochastic Moment Matching
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Static timing analysis considering power supply variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Stochastic variational analysis of large power grids considering intra-die correlations
Proceedings of the 43rd annual Design Automation Conference
Defect Simulation Methodology for iDDT Testing
Journal of Electronic Testing: Theory and Applications
High-performance CMOS variability in the 65-nm regime and beyond
IBM Journal of Research and Development - Advanced silicon technology
Partitioning-based decoupling capacitor budgeting via sequence of linear programming
Integration, the VLSI Journal
Large scale P/G grid transient simulation using hierarchical relaxed approach
Integration, the VLSI Journal
Analysis of Power Supply Noise in the Presence of Process Variations
IEEE Design & Test
Power grid analysis benchmarks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
IBM POWER6 microprocessor physical design and design methodology
IBM Journal of Research and Development
Efficient representation and analysis of power grids
Proceedings of the conference on Design, automation and test in Europe
ETBR: extended truncated balanced realization method for on-chip power grid network analysis
Proceedings of the conference on Design, automation and test in Europe
Generating Worst-Case Stimuli for Accurate Power Grid Analysis
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Generating realistic stimuli for accurate power grid analysis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Stochastic power/ground supply voltage prediction and optimization via analytical placement
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Locality-driven parallel power grid optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient power network analysis considering multidomain clock gating
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Adaptive circuit block model for power supply noise analysis of low power system-an-chip
SOC'09 Proceedings of the 11th international conference on System-on-chip
Efficient simulation of power grids
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
Efficient power grid integrity analysis using on-the-fly error check and reduction
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
More realistic power grid verification based on hierarchical current and power constraints
Proceedings of the 2011 international symposium on Physical design
PowerRush: a linear simulator for power grid
Proceedings of the International Conference on Computer-Aided Design
Power supply selective mapping for accurate timing analysis
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs
Proceedings of the 49th Annual Design Automation Conference
Deterministic random walk preconditioning for power grid analysis
Proceedings of the International Conference on Computer-Aided Design
Design analysis of IC power delivery
Proceedings of the International Conference on Computer-Aided Design
Voltage propagation method for 3-D power grid analysis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Parallel power grid analysis using preconditioned GMRES solver on CPU-GPU platforms
Proceedings of the International Conference on Computer-Aided Design
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The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance limiting factors [1, 2, 3], then their analysis is important in order to (1) predict the performance and (2) improve the performance if necessary. Thus, there is a clear need for new efficient, in terms of both execution time and memory, techniques for power grid analysis.This paper discusses the modeling of power grids and proposes a new PDE-like multigrid method for the simulation of power grids. The proposed method is very efficient and suitable for both DC and transient simulation of power grids.