Design and analysis of power distribution networks in PowerPC microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Full-chip verification methods for DSM power distribution systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hierarchical analysis of power distribution networks
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Power network analysis using an adaptive algebraic multigrid approach
Proceedings of the 40th annual Design Automation Conference
On-chip power supply network optimization using multigrid-based technique
Proceedings of the 40th annual Design Automation Conference
An algebraic multigrid solver for analytical placement with layout based clustering
Proceedings of the 40th annual Design Automation Conference
Power/Ground Mesh Area Optimization Using Multigrid-Based Technique
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An unconditional stable general operator splitting method for transistor level transient analysis
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
RCLK-VJ network reduction with Hurwitz polynomial approximation
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A hierarchical analysis methodology for chip-level power delivery with realizable model reduction
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Efficient transient simulation for transistor-level analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Floorplan and power/ground network co-synthesis for fast design convergence
Proceedings of the 2006 international symposium on Physical design
Incremental and on-demand random walk for iterative power distribution network analysis
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Fast Poisson solver preconditioned method for robust power grid analysis
Proceedings of the International Conference on Computer-Aided Design
Power supply selective mapping for accurate timing analysis
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Link breaking methodology: mitigating noise within power networks
Proceedings of the great lakes symposium on VLSI
PGT_SOLVER: an efficient solver for power grid transient analysis
Proceedings of the International Conference on Computer-Aided Design
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Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on the grid reduces noise margin and increases gate delay, resulting in a serious performance impact. Checking the integrity of the supply voltage using traditional circuit simulation is not practical, for reasons of time and memory complexity. We propose a novel multigrid-like technique for the analysis of power grids. The grid is reduced to a coarser structure, and the solution is mapped back to the original grid. Experimental results show that the proposed method is very efficient as well as suitable for both DC and transient analysis of power grids.