Hierarchical analysis of power distribution networks
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources
Proceedings of the 37th Annual Design Automation Conference
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Power grid reduction based on algebraic multigrid principles
Proceedings of the 40th annual Design Automation Conference
Partitioning-based approach to fast on-chip decap budgeting and minimization
Proceedings of the 42nd annual Design Automation Conference
Approximation of Large-Scale Dynamical Systems (Advances in Design and Control) (Advances in Design and Control)
Variational interconnect analysis via PMTBR
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Direct Methods for Sparse Linear Systems (Fundamentals of Algorithms 2)
Direct Methods for Sparse Linear Systems (Fundamentals of Algorithms 2)
Power grid analysis benchmarks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ETBR: extended truncated balanced realization method for on-chip power grid network analysis
Proceedings of the conference on Design, automation and test in Europe
Electronic Circuit & System Simulation Methods (SRE)
Electronic Circuit & System Simulation Methods (SRE)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pattern-Based Iterative Method for Extreme Large Power/Ground Analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, we present a new voltage IR drop analysis approach for large on-chip power delivery networks. The new approach is based on recently proposed sampling based reduction technique to reduce the circuit matrices before the simulation. Due to the disruptive nature of tap current waveforms in typical industry power grid networks, input current sources typically has wide frequency power spectrum. To avoid the excessively sampling, the new approach introduces an error check mechanism and on-the-fly error reduction scheme during the simulation of the reduced circuits to improve the accuracy of estimating the the large IR drops. The proposed method presents a new way to combine model order reduction and simulation to achieve the overall efficiency of simulation. The new method can also easily trade errors for speed for different applications. Experimental results show the proposed IR drop analysis method can significantly reduce the errors of the existing ETBR method at the similar computing cost, while it can have 10X and more speedup over the the commercial power grid simulator in UltraSim with about 1--2% errors on a number of real industry benchmark circuits.