Proceedings of the 37th Annual Design Automation Conference
Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Algorithm 856: APPSPACK 4.0: asynchronous parallel pattern search for derivative-free optimization
ACM Transactions on Mathematical Software (TOMS)
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network
Proceedings of the conference on Design, automation and test in Europe
Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Optimal design of the power-delivery network for multiple voltage-island system-on-chips
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
Proceedings of the 47th Design Automation Conference
Decoupling for power gating: sources of power noise and design strategies
Proceedings of the 48th Design Automation Conference
A fully on-chip area-efficient CMOS low-dropout regulator with fast load regulation
Analog Integrated Circuits and Signal Processing
Proceedings of the International Conference on Computer-Aided Design
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Power delivery design plays a critical role in ensuring power delivery integrity and achieving overall design power efficiency. A power delivery network (PDN) consists of a multiplicity of passive and active components, which interact with each other in a complex manner. Under this context, power delivery design is a multifaceted problem and a holistic system optimization involving joint design of the passive distribution sub-network and active voltage converters and regulators is indispensable. This paper provides a succinct review of the related PDN analysis and design problems and motivates the need for system-level co-optimization of key design parameters in order to optimally trade off between power supply noise, power efficiency, area overhead and stability.