PRIMA: passive reduced-order interconnect macromodeling algorithm
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Estimation of maximum current envelope for power bus analysis and design
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Hierarchical analysis of power distribution networks
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Model and analysis for combined package and on-chip power grid simulation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Static timing analysis including power supply noise effect on propagation delay in VLSI circuits
Proceedings of the 38th annual Design Automation Conference
Simulation and optimization of the power distribution network in VLSI circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Frequency domain analysis of switching noise on power supply network
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Efficient model order reduction via multi-node moment matching
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Hierarchical random-walk algorithms for power grid analysis
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Partitioning-based approach to fast on-chip decap budgeting and minimization
Proceedings of the 42nd annual Design Automation Conference
A multigrid-like technique for power grid analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power grid analysis using random walks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Stochastic power/ground supply voltage prediction and optimization via analytical placement
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper proposes a novel method for analyzing large onchip power delivery networks via a stochastic moment matching (SMM) method. The proposed method extends the existing direct stochastic random walk method that can be only applied to DC analysis in purely resistive networks or transient analysis of RC networks with low efficiency. The new method can analyze general structure RLC networks by combining the stochastic process with frequency domain moment matching technique. As a result, we achieve better scalability than traditional frequency domain P/G analysis approaches, and better efficiency than existing random walk transient analysis techniques. Our experimental results show that SMM can easily trade efficiency for accuracy or vise versa. SMM can easily deliver 10X-100X speedup over a LU-based direct solver and about 10X speedup over the pure random walk method with reasonable accuracy on large industry P/G networks.