Hierarchical random-walk algorithms for power grid analysis

Authors:
Haifeng Qian;Sachin S. Sapatnekar
Affiliations:
University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN
Venue:
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Year:
2004

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Abstract

This paper presents a power grid analyzer that combines a divide-and-conquer strategy with a random-walk engine. A single-level hierarchical method is first described and then extended to multi-level and "virtual-layer" hierarchy. Experimental results show that these algorithms not only achieve speedups over the generic random-walk method, but also are more robust in solving various types of industrial circuits. For example, a 71K-node circuit is solved in 4.16 seconds, showing a more than 4 times speedup over the generic method; a 348K-node wire-bond power grid, for which the performance of the generic method degrades, is solved in 75.88 seconds.