Vector generation for maximum instantaneous current through supply lines for CMOS circuits
DAC '97 Proceedings of the 34th annual Design Automation Conference
Design and analysis of power distribution networks in PowerPC microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Full-chip verification methods for DSM power distribution systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
VIP—an input pattern generator for indentifying critical voltage drop for deep sub-micron designs
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Proceedings of the 37th Annual Design Automation Conference
Model and analysis for combined package and on-chip power grid simulation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Design of High-Performance Microprocessor Circuits
Design of High-Performance Microprocessor Circuits
RC Power Bus Maximum Voltage Drop in Digital VLSI Circuits
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Hierarchical analysis of power distribution networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Stochastic Power Grid Analysis Considering Process Variations
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Stochastic variational analysis of large power grids considering intra-die correlations
Proceedings of the 43rd annual Design Automation Conference
Accurate power grid analysis with behavioral transistor network modeling
Proceedings of the 2007 international symposium on Physical design
Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Efficient decoupling capacitance budgeting considering operation and process variations
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2008 international symposium on Physical design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Statistical static timing analysis considering leakage variability in power gated designs
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Statistical analysis of large on-chip power grid networks by variational reduction scheme
Integration, the VLSI Journal
Verification and codesign of the package and die power delivery system using wavelets
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
More realistic power grid verification based on hierarchical current and power constraints
Proceedings of the 2011 international symposium on Physical design
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Power supply integrity analysis is critical in modern high perfor-mance designs. In this paper, we propose a stochastic approach to obtain statistical information about the collective IR and LdI/dt drop in a power supply network. The currents drawn from the power grid by the blocks in a design are modelled as stochastic processes and their statistical information is extracted, including correlation infor-mation between blocks in both space and time. We then propose a method to propagate the statistical parameters of the block currents through the linear model of the power grid to obtain the mean and standard deviation of the voltage drops at any node in the grid. We show that the run time is linear with the length of the current wave-forms allowing for extensive vectors, up to millions of cycles, to be analyzed. We implemented the approach on a number of grids, including a grid from an industrial microprocessor and demonstrate its accuracy and efficiency. The proposed statistical analysis can be use to determine which portions of the grid are most likely to fail as well as to provide information for other analyses, such as statistical timing analysis.