VIP—an input pattern generator for indentifying critical voltage drop for deep sub-micron designs

Authors:
Yi-Min Jiang;Tak K. Young;Kwang-Ting Cheng
Affiliations:
Dept. of Electrical & Computer Engineering, University of California, Santa Barbara, CA;Synopsys, Inc., 700 East Middlefield Road, Mountain View, CA;Dept. of Electrical & Computer Engineering, University of California, Santa Barbara, CA
Venue:
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Year:
1999

Combinatorial optimization: algorithms and complexity

Combinatorial optimization: algorithms and complexity
K2: an estimator for peak sustainable power of VLSI circuits

ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Estimation of maximum power supply noise for deep sub-micron designs

ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Genetic Algorithms in Search, Optimization and Machine Learning

Genetic Algorithms in Search, Optimization and Machine Learning

Hierarchical analysis of power distribution networks

Proceedings of the 37th Annual Design Automation Conference
Model and analysis for combined package and on-chip power grid simulation

ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A stochastic approach To power grid analysis

Proceedings of the 41st annual Design Automation Conference
Vectorless Analysis of Supply Noise Induced Delay Variation

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Double sampling data checking technique: an online testing solution for multisource noise-induced errors on on-chip interconnects and buses

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Hi-index	0.00