Electromigration reliability enhancement via bus activity distribution
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Full-chip verification methods for DSM power distribution systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
The Case for Lifetime Reliability-Aware Microprocessors
Proceedings of the 31st annual international symposium on Computer architecture
The Impact of Technology Scaling on Lifetime Reliability
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
Electromigration-Aware Physical Design of Integrated Circuits
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI
Analog Integrated Circuits and Signal Processing
Fault tolerant bus architecture for deep submicron based processors
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Relaxed hierarchical power/ground grid analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
introduction to electromigration-aware physical design
Proceedings of the 2006 international symposium on Physical design
A Framework for Architecture-Level Lifetime Reliability Modeling
DSN '07 Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks
A methodology for the simultaneous design of supply and signal networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On-chip power-supply network optimization using multigrid-based technique
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs
Proceedings of the 49th Annual Design Automation Conference
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Degradation of devices has become a major issue for processor design due to continuous device shrinkage and current density increase. Transistors and wires suffer high stress, and failures may appear in the field. In particular, wires degrade mainly due to electromigration when driving current. Techniques to mitigate electromigration to some extent have been proposed from the circuit point of view, but much effort is still required from the microarchitecture side to enable wire scaling in future technologies. This survey brings to the microarchitecture community a comprehensive study of the causes and implications of electromigration in digital circuits and describes the challenges that must be faced to mitigate electromigration by means of microarchitectural solutions.