Introduction to algorithms
Power and ground network topology optimization for cell based VLSIs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Fast power/ground network optimization based on equivalent circuit modeling
Proceedings of the 38th annual Design Automation Conference
Fast analysis and optimization of power/ground networks
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Area minimization of power distribution network using efficient nonlinear programming techniques
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A static pattern-independent technique for power grid voltage integrity verification
Proceedings of the 40th annual Design Automation Conference
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
Topology optimization of structured power/ground networks
Proceedings of the 2004 international symposium on Physical design
Early-stage power grid analysis for uncertain working modes
Proceedings of the 2004 international symposium on Physical design
Area fill synthesis for uniform layout density
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dummy fill density analysis with coupling constraints
Proceedings of the 2007 international symposium on Physical design
Novel wire density driven full-chip routing for CMP variation control
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A novel wire-density-driven full-chip routing system for CMP variation control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Weakness identification for effective repair of power distribution network
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
Simultaneous OPC- and CMP-aware routing based on accurate closed-form modeling
Proceedings of the 2013 ACM international symposium on International symposium on physical design
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This paper presents SPIDER, a novel methodology that advantageously utilizes metal fill to simultaneously fulfil metal density requirements and reduce IR-drop of the power distribution network. This is achieved through the addition of partially redundant connections between metal fills and power meshes. Our technique is especially significant for 90nm process technology or below because (1) metal fill must now be done as part of the IC implementation flow due to its increasing impact on timing, (2) the tolerance for IR drop is tightening due to voltage scaling, and the increasingly conservative power mesh design to address IR-drop is adding significant burden on the available routing resources, (3) IR-drop is getting worse due to increasing design sizes, and (4) the large degree of design uncertainty demands IRdrop repair capabilities that can be applied after routing is completed. SPIDER addresses all these issues practically with little or no cost. Experimental results further demonstrated the robustness and effectiveness of our approach: SPIDER achieves an average IR-drop reduction of 62.2% in 16 designs of various sizes.