Clock trees: differential or single ended?

Authors:
Deepak C. Sekar
Affiliations:
Georgia Institute of Technology, Atlanta
Venue:
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Year:
2005

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Abstract

In this paper, a low-swing differential clock distribution scheme is presented, and is compared with widely used single ended clock distribution. Test chips based on these two clocking styles are designed with 1 GHz clocks in a 90 nm technology. Low-swing differential clock trees are seen to have 25-42% less sensitivity to power supply noise and 6% less sensitivity to manufacturing variations than single ended clock trees, which leads to significant savings in skew and jitter. Another important contribution of this paper is the development of techniques to design robust single ended and differential clock trees.