Stack computers: the new wave
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Making Java Work for Microcontroller Applications
IEEE Design & Test
Real-Time Objects on the Bare Metal: An Efficient Hardware Realization of the JavaTM Virtual Machine
ISORC '01 Proceedings of the Fourth International Symposium on Object-Oriented Real-Time Distributed Computing
A time predictable Java processor
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A Java processor architecture for embedded real-time systems
Journal of Systems Architecture: the EUROMICRO Journal
Time-predictable computer architecture
EURASIP Journal on Embedded Systems - FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms
Towards Time-Predictable Data Caches for Chip-Multiprocessors
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Worst-case execution time analysis for a Java processor
Software—Practice & Experience
A real-time Java chip-multiprocessor
ACM Transactions on Embedded Computing Systems (TECS)
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Although virtually every processor today uses a loadstore register architecture, stack architectures attract attention again due to the success of Java. The intermediate language of Java, the Java bytecodes, is stack based and therefore a hardware realization of the Java Virtual Machine (JVM), a Java processor, is also stack based. In this paper two different architectures, found in Java processors, are presented. Detailed analysis of the JVM access patterns to the stack prove that a simpler and faster solution is possible. The proposed solution is a stack with two levels of on-chip cache.