IBM experiments in soft fails in computer electronics (1978–1994)
IBM Journal of Research and Development - Special issue: terrestrial cosmic rays and soft errors
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
A Web-Based Multiuser Operating System for Reconfiguarble Computing
Proceedings of the 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing
Task Rearrangement on Partially Reconfigurable FPGAs with Restricted Buffer
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
A Virtual Hardware Operating System for the Xilinx XC6200
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Configuration-Sensitive Process Scheduling for FPGA-Based Computing Platforms
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Online Scheduling for Block-Partitioned Reconfigurable Devices
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The Development of an Operating System for Reconfigurable Computing
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
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This paper proposes, for the FPGA-based embedded systems, a reliability-aware process scheduling strategy that operates under performance bounds. A unique characteristic of the proposed approach is that it employs multiple implementations (also called versions) of a given process; each version differs from the other implementations (of the same process) from the viewpoint of reliability, performance, power, or area metrics. Our scheme, which can work under a base scheduler or independently, tries to use the most reliable version for each process, restricted only by the performance bound specified. We implemented this scheme and simulated it using a custom simulator.