PIM lite: a multithreaded processor-in-memory prototype

Authors:
Shyamkumar Thoziyoor;Jay Brockman;Daniel Rinzler
Affiliations:
University of Notre Dame;University of Notre Dame;Harvey Mudd College
Venue:
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Year:
2005

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Abstract

PIM Lite is a processor-in-memory prototype implemented in a 0.18 micron logic process. PIM Lite provides a complete working demonstration of a minimal-state, lightweight multithreaded processor with low-overhead thread swapping. Minimizing processor state by keeping thread state in memory and using a regular, tiled and memory-centric design greatly simplified VLSI development and testing.