Classical floorplanning harmful?
ISPD '00 Proceedings of the 2000 international symposium on Physical design
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Fast evaluation of sequence pair in block placement by longest common subsequence computation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
An enhanced pertubing algorithm for floorplan design using the O-tree representation
ICCAD '00 Proceedings of the 2000 international conference on Computer-aided design
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Fixed-Outline Floorplanning through Better Local Search
ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
Robust fixed-outline floorplanning through evolutionary search
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, an efficient algorithm addressed to fixed-outline floorplanning is presented. The proposed algorithm takes sequence pair as representation and has following main features: (1) it uses common subsequence and penalty function to bound the variations of the widths of the floorplans to a quite small range; (2) a simple cost function which has no items about the heights of the floorplans is presented; (3) two-stage simulated annealing is adopted to minimize the wirelength. Experimental results show that the proposed algorithm is superior to other state-of-the-art fixed-outline floorplanning approaches in the following aspects: (1) it can achieve high successful probabilities, even with tight outlines and large aspect ratios given; (2) the feasibility of the given outline will be evaluated at the beginning of the floorplanning, which can save much time when infeasible outline is given. Besides, the experimental results on wirelength optimization are also promising.