Automatically partitioning packet processing applications for pipelined architectures

  • Authors:

  • Jinquan Dai;Bo Huang;Long Li;Luddy Harrison

  • Affiliations:

  • Intel China Software Center, Shanghai, PRC;Intel China Software Center, Shanghai, PRC;Intel China Software Center, Shanghai, PRC;Univ. of Illinois at Urbana-Champaign, Urbana, IL

  • Venue:
  • Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
  • Year:
  • 2005

Quantified Score

Hi-index 0.00

Visualization

Abstract

Modern network processors employs parallel processing engines (PEs) to keep up with explosive internet packet processing demands. Most network processors further allow processing engines to be organized in a pipelined fashion to enable higher processing throughput and flexibility. In this paper, we present a novel program transformation technique to exploit parallel and pipelined computing power of modern network processors. Our proposed method automatically partitions a sequential packet processing application into coordinated pipelined parallel subtasks which can be naturally mapped to contemporary high-performance network processors. Our transformation technique ensures that packet processing tasks are balanced among pipeline stages and that data transmission between pipeline stages is minimized. We have implemented the proposed transformation method in an auto-partitioning C compiler product for Intel Network Processors. Experimental results show that our method provides impressive speed up for the commonly used NPF IPv4 forwarding and IP forwarding benchmarks. For a 9-stage pipeline, our auto-partitioning C compiler obtained more than 4X speedup for the IPv4 forwarding PPS and the IP forwarding PPS (for both the IPv4 traffic and IPv6 traffic).