Design automation for microfluidics-based biochips
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Multiple fault diagnosis in digital microfluidic biochips
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Computer-Aided Design and Test for Digital Microfluidics
IEEE Design & Test
Testing and Diagnosis of Realistic Defects in Digital Microfluidic Biochips
Journal of Electronic Testing: Theory and Applications
Efficient parallel testing and diagnosis of digital microfluidic biochips
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Design automation and test solutions for digital microfluidic biochips
IEEE Transactions on Circuits and Systems Part I: Regular Papers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
Defect tolerance is an important design consideration for microfluidics-based biochips that are used for safety-critical applications. We propose a defect tolerance methodology based on graceful degradation and dynamic reconfiguration. We first introduce a tile-based biochip architecture, which is scalable for large-scale bioassays. A clustered defect model is used to evaluate the graceful degradation method for tile-based biochips. The proposed schemes ensure that the bioassays mapped to a droplet-based microfluidic array during design can be executed on a defective biochip through operation rescheduling and/or resource rebinding. Real-life biochemical procedures, namely polymerase chain reaction (PCR) and multiplexed in-vitro diagnostics on human physiological fluids, are used to evaluate the proposed defect tolerance schemes.