Extensible multiplier-accumulator blocks for FPGAs

Authors:
António B. Ferrari;Rui R. Almeida;Rui E. Martins
Affiliations:
University of Aveiro, Portugal;Siemens S.A, Lisbon, Portugal;University of Aveiro, Portugal
Venue:
WISICT '05 Proceedings of the 4th international symposium on Information and communication technologies
Year:
2005

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Abstract

This paper presents an extensible multiplier block suitable for embedding in FPGAs. The block is based on the radix-4 modified Booth's algorithm and supports the multiplication of 2's complement, unsigned or mixed-mode operands. The blocks can be cascaded to support larger operand lengths, with the resulting configuration offering a significant speed advantage over existing schemes.