Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
In transition from global to modular temporal reasoning about programs
Logics and models of concurrent systems
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Expressing interesting properties of programs in propositional temporal logic
POPL '86 Proceedings of the 13th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Symbolic Model Checking
The Formal Design of 1M-gate ASICs
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
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Model checking is a technique of automatically verifying logical properties of the behavior of finite state systems. These properties are expressed in temporal logic (Burgess, 1984), a class of logics that is well suited to specifying the relationship of events in time. For example, in temporal logic, one can readily specify that condition p must eventually be followed by condition q, or that, after p, condition q must hold until the next occurrence of r, and so forth. A model checker determines whether a given finite state model satisfies a formula in the logic. In the negative case, it can supply a counterexample, that is, a behavioral trace that shows that the specified formula is false.