Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
A Virtual Hardware Operating System for the Xilinx XC6200
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
RMB -- A Reconfigurable Multiple Bus Network
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Hard Real-Time Communication in Bus-Based Networks
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
Physically-aware exploitation of component reuse in a partially reconfigurable architecture
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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This paper presents algorithms for the placement of intermodule signals on dynamically and partially reconfigurable devices. Intermodule signals facilitate communication across reconfigurable module boundaries on FPGA devices and must guarantee conformance to partial reconfiguration requirements, i.e., they must represent static and fixed communication resources. Beside the realization of such communication as reliable signals, the physical location must be conform to all possible abutting modules, particularly if different modules with different communication requirements are temporally loaded into the same physical location.In this paper, we investigate the requirements for the placement of signals for such temporal changing conditions. After presenting and categorizing critical scenarios, we formalize strategies to find valid locations for the intermodule signals. Considering the dynamically loadable modules and their connections as a graph, we can avoid signal conflicts, if the physical allocation of the signals harmonizes with all modules in the nearest and second nearest neighboring range. In order to prove the applicability, we test our developed algorithms for different scenarios.