Interactive presentation: An FPGA implementation of decision tree classification
Proceedings of the conference on Design, automation and test in Europe
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Application development on hybrid systems
Proceedings of the 2007 ACM/IEEE conference on Supercomputing
Visions for application development on hybrid computing systems
Parallel Computing
Proceedings of the conference on Design, automation and test in Europe
Quantization Error and Accuracy-Performance Tradeoffs for Embedded Data Mining Workloads
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part III: ICCS 2007
FPGA: what's in it for a database?
Proceedings of the 2009 ACM SIGMOD International Conference on Management of data
Sorting on architecturally diverse computer systems
Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications
FPGAs: a new point in the database design space
Proceedings of the 13th International Conference on Extending Database Technology
Non-Instruction Fetch-Based Architecture Reduces Almost 100 Percent of the Dynamic Power and Energy
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
A highly parallel algorithm for frequent itemset mining
MCPR'10 Proceedings of the 2nd Mexican conference on Pattern recognition: Advances in pattern recognition
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
An FPGA-Based Accelerator for Frequent Itemset Mining
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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The Apriori algorithm is a popular correlation-based data-mining kernel. However, it is a computationally expensive algorithm and the running times can stretch up to days for large databases, as database sizes can extend to Gigabytes. Through the use of a new extension to the systolic array architecture, time required for processing can be significantly reduced. Our array architecture implementation on a Xilinx Virtex-II Pro 100 provides a performance improvement that can be orders of magnitude faster than the state-of-the-art software implementations. The system is easily scalable and introduces an efficient "systolic injection" method for intelligently reporting unpredictably generated mid-array results to a controller without any chance of collision or excessive stalling.