Sorting on architecturally diverse computer systems

  • Authors:
  • Roger D. Chamberlain;Narayan Ganesan

  • Affiliations:
  • Washington University in St. Louis;Washington University in St. Louis

  • Venue:
  • Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications
  • Year:
  • 2009

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Abstract

Sorting is an important problem that forms an essential component of many high-performance applications. Here, we explore the design space of sorting algorithms in recon-figurable hardware, looking to maximize the benefit associated with high-bandwidth, multiple-port access to memory. Rather than focus on an individual implementation, we investigate a family of approaches that exploit characteristics fairly unique to reconfigurable hardware.