Storing a Sparse Table with 0(1) Worst Case Access Time
Journal of the ACM (JACM)
Communications of the ACM
Two hybrid methods for collision resolution in open addressing hashing
No. 318 on SWAT 88: 1st Scandinavian workshop on algorithm theory
Introduction to algorithms
On efficient unsuccessful search
SODA '92 Proceedings of the third annual ACM-SIAM symposium on Discrete algorithms
On contention resolution protocols and associated probabilistic phenomena
STOC '94 Proceedings of the twenty-sixth annual ACM symposium on Theory of computing
Balanced allocations (extended abstract)
STOC '94 Proceedings of the twenty-sixth annual ACM symposium on Theory of computing
Parallel randomized load balancing
STOC '95 Proceedings of the twenty-seventh annual ACM symposium on Theory of computing
Scalable high speed IP routing lookups
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
SODA '90 Proceedings of the first annual ACM-SIAM symposium on Discrete algorithms
Expected Length of the Longest Probe Sequence in Hash Code Searching
Journal of the ACM (JACM)
Bro: a system for detecting network intruders in real-time
Computer Networks: The International Journal of Computer and Telecommunications Networking
Summary cache: a scalable wide-area web cache sharing protocol
IEEE/ACM Transactions on Networking (TON)
Membership in Constant Time and Almost-Minimum Space
SIAM Journal on Computing
Space/time trade-offs in hash coding with allowable errors
Communications of the ACM
Anti-presistence: history independent data structures
STOC '01 Proceedings of the thirty-third annual ACM symposium on Theory of computing
How Asymmetry Helps Load Balancing
FOCS '99 Proceedings of the 40th Annual Symposium on Foundations of Computer Science
The power of two choices in randomized load balancing
The power of two choices in randomized load balancing
Fast hash table lookup using extended bloom filter: an aid to network processing
Proceedings of the 2005 conference on Applications, technologies, architectures, and protocols for computer communications
Reconciling performance and programmability in networking systems
Proceedings of the 2007 conference on Applications, technologies, architectures, and protocols for computer communications
Modified collision packet classification using counting Bloom filter in tuple space
PDCN'07 Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: parallel and distributed computing and networks
Flashlook: 100-Gbps hash-tuned route lookup architecture
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
Revisiting the case for a minimalist approach for network flow monitoring
IMC '10 Proceedings of the 10th ACM SIGCOMM conference on Internet measurement
Divide and discriminate: algorithm for deterministic and fast hash lookups
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Fast dynamic multiple-set membership testing using combinatorial bloom filters
IEEE/ACM Transactions on Networking (TON)
A cache architecture for counting bloom filters: theory and application
Journal of Electrical and Computer Engineering
FlashTrie: beyond 100-Gb/s IP route lookup using hash-based prefix-compressed trie
IEEE/ACM Transactions on Networking (TON)
Fast and deterministic hash table lookup using discriminative bloom filters
Journal of Network and Computer Applications
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Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite frequent, resulting in decreased performance. In this paper, we propose the segmented hash table architecture, which ensures constant time hash operations at high loads with high probability. To achieve this, the hash memory is divided into N logical segments so that each incoming key has N potential storage locations; the destination segment is chosen so as to minimize collisions. In this way, collisions, and the associated probe sequences, are dramatically reduced. In order to keep memory utilization minimized, probabilistic filters are kept on-chip to allow the N segments to be accessed without in-creasing the number of off-chip memory operations. These filters are kept small and accurate with the help of a novel algorithm, called selective filter insertion, which keeps the segments balanced while minimizing false positive rates (i.e., incorrect filter predictions). The performance of our scheme is quantified via analytical modeling and software simulations. Moreover, we discuss efficient implementations that are easily realizable in modern device technologies. The performance benefits are significant: average search cost is reduced by 40% or more, while the likelihood of requiring more than one memory operation per search is reduced by several orders of magnitude.