A simulation of power-aware scheduling of task graphs to multiple processors
MOAS'07 Proceedings of the 18th conference on Proceedings of the 18th IASTED International Conference: modelling and simulation
ETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor
Proceedings of the 45th annual Design Automation Conference
Leakage-Aware Multiprocessor Scheduling
Journal of Signal Processing Systems
A simulation of power-aware scheduling of task graphs to multiple processors
MS '07 The 18th IASTED International Conference on Modelling and Simulation
Optimizing throughput and latency under given power budget for network packet processing
INFOCOM'10 Proceedings of the 29th conference on Information communications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Staying-alive path planning with energy optimization for mobile robots
Expert Systems with Applications: An International Journal
Rolling-horizon scheduling for energy constrained distributed real-time embedded systems
Journal of Systems and Software
Networks on chips: structure and design methodologies
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
UNISM: unified scheduling and mapping for general networks on chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 0.00 |
For multiprocessor embedded systems, the dynamic voltage scaling (DVS) technique can be applied to scheduled applications for energy reduction. DVS utilizes slack in the schedule to slow down processes and save energy. Therefore, it is generally believed that the maximal energy saving is achieved on a schedule with the minimum makespan (maximal slack). Most current approaches treat task assignment, scheduling, and DVS separately. In this paper, we present a framework called CASPER (Combined Assignment, Scheduling, and PowER-management) that challenges this common belief by integrating task scheduling and DVS under a single iterative optimization loop via genetic algorithm. We have conducted extensive experiments to validate the energy ef?ciency of CASPER. For homogeneous multiprocessor systems (in which all processors are of the same type), we consider a recently proposed slack distribution algorithm (PDP-SPM) [3]: applying PDP-SPM on the schedule with the minimal makespan gives an average of 53.8% energy saving; CASPER ?nds schedules with slightly larger makespan but a 57.3% energy saving, a 7.8% improvement. For heterogeneous systems, we consider the power variation DVS (PV-DVS) algorithm [13], CASPER improves its energy ef?ciency by 8.2%. Finally, our results also show that the proposed single loop CASPER framework saves 23.3% more energy over GMA+EE-GLSA [12], the only other known integrated approach with a nested loop that combines scheduling and power management in the inner loop but leaves assignment in the outer loop.