Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Introduction to algorithms
Channel routing in Manhattan-diagonal model
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Non-Manhattan Routing Using a Manhattan Router
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Multilevel full-chip routing for the X-based architecture
Proceedings of the 42nd annual Design Automation Conference
| Hi-index | 0.00 |
In Deep Sub-micron (DSM) technologies, wire delays comprise a dominant fraction of the total delay of a design. As a consequence, routing techniques which reduce the total wire length of a design, are highly relevant to such technologies. One such approach which holds promise is that of non-Manhattan routing (or X routing). In this paper, we describe a technique to perform non- Manhattan routing by combining the results of two related Manhattan routing instances. The first is a regular, unrotated routing instance. The second routing instance is derived from the first by rotating the coordinate system by 45 degree. Both instances are routed on the same pair of metal layers. By selectively combining the results of the two instances, we obtain a final routing result that contains non-Manhattan wire segments. Our approach utilizes a powerful Floyd-Warshall based engine to combine the results of the two instances. We demonstrate that our router produces highly efficient results, reducing the total wire length by an average of about 20% (31%) over the unrotated (rotated) results, with a viacount decrease of between 4% (43%).