CMOS floating-point unit for the S/390 parallel enterprise server G4
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
PVS: A Prototype Verification System
CADE-11 Proceedings of the 11th International Conference on Automated Deduction: Automated Deduction
Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
A Parametric Error Analysis of Goldschmidt's Division Algorithm
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
A Bitvectors Library for PVS
On Optimal Ierative Schemes for High-Speed Division
IEEE Transactions on Computers
On Division by Functional Iteration
IEEE Transactions on Computers
The IBM system/360 model 91: floating-point execution unit
IBM Journal of Research and Development
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Back in the 60驴s Goldschmidt presented a variation of Newton-Raphson iterations for division that is well suited for pipelining. The problem in using Goldschmidt驴s division algorithm is to verify that the implementation meets the precision required for the quotient and provides correct rounding, in particular if hardware resources are to be used judiciously. Previous implementations relied on error analysis that were not quite tight and that were specific to one parameter setting and target precision. Our formal verification effort focuses on a parametric division implementation based on Goldschmidt驴s algorithm for different parameter settings and target precisions. We formalize a tight and parametric error analysis of Goldschmidt驴s division algorithm in PVS and prove its correctness. On this basis we propose formally verified parametric division implementations.