Improving Goldschmidt Division, Square Root, and Square Root Reciprocal
IEEE Transactions on Computers - Special issue on computer arithmetic
Boosting Very-High Radix Division with Prescaling and Selection by Rounding
IEEE Transactions on Computers
The Symmetric Table Addition Method for Accurate Function Approximation
Journal of VLSI Signal Processing Systems
High-Speed Double-Precision Computation of Reciprocal, Division, Square Root and Inverse Square Root
IEEE Transactions on Computers
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Theoretical Computer Science - Real numbers and computers
Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root
IEEE Transactions on Computers
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IEEE Transactions on Computers
High-Speed Function Approximation Using a Minimax Quadratic Interpolator
IEEE Transactions on Computers
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation
Journal of VLSI Signal Processing Systems
A parametric error analysis of Goldschmidt's division algorithm
Journal of Computer and System Sciences
Formal Verification of Parametric Multiplicative Division Implementations
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
An iterative division algorithm for FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Choosing starting values for certain Newton-Raphson iterations
Theoretical Computer Science - Real numbers and computers
A Digit-by-Digit Algorithm for mth Root Extraction
IEEE Transactions on Computers
Floating-point division and square root using a Taylor-series expansion algorithm
Microelectronics Journal
ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A goldschmidt division method with faster than quadratic convergence
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scalable power control for many-core architectures running multi-threaded applications
Proceedings of the 38th annual international symposium on Computer architecture
A monadic approach to automated reasoning for Bluespec SystemVerilog
Innovations in Systems and Software Engineering
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This paper presents the AMD-K7 IEEE 754 and x87 compliant floating point division and square root algorithms and implementation. The AMD-K7 processor employs an iterative implementation of a series expansion to converge quadratically to the quotient and square root. Highly accurate initial approximations and a high performance shared floating point multiplier assist in achieving low division and square root latencies at high operating frequencies. A novel time-sharing technique allows independent floating point multiplication operations to proceed while division or square root computation is in progress. Exact IEEE 754 rounding for all rounding modes and target precisions has been verified by conventional directed and random testing procedures, along with the formulation of a mechanically-checked formal proof using the ACL2 theorem prover.