Log depth circuits for division and related problems
SIAM Journal on Computing
Area-time optimal division for T =Ω((log n)1+ε)*
Information and Computation
Efficient parallel circuits and algorithms for division
Information Processing Letters
Optimal size integer division circuits
SIAM Journal on Computing
Fast multiplication: algorithms and implementation
Fast multiplication: algorithms and implementation
Area and performance tradeoffs in floating-point divide and square-root implementations
ACM Computing Surveys (CSUR)
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
CMOS floating-point unit for the S/390 parallel enterprise server G4
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
Computer Arithmetic: Logic and Design
Computer Arithmetic: Logic and Design
Computer Architecture: Complexity and Correctness
Computer Architecture: Complexity and Correctness
Integration, the VLSI Journal
Faithful Bipartite ROM Reciprocal Tables
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
Series Approximation Methods for Divide and Square Root in the Power3(TM) Processor
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
A Parametric Error Analysis of Goldschmidt's Division Algorithm
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
Proceedings of the conference on Design, automation and test in Europe
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Back in the 1960s Goldschmidt presented a variation of Newton-Raphson iterations for division that is well suited for pipelining. The problem in using Goldschmidt's division algorithm is to present an error analysis that enables one to save hardware by using just the right amount of precision for intermediate calculations while still providing correct rounding. Previous implementations relied on combining formal proof methods (that span thousands of lines) with millions of test vectors. These techniques yield correct designs but the analysis is hard to follow and is not quite tight.We present a simple parametric error analysis of Goldschmidt's division algorithm. This analysis sheds more light on the effect of the different parameters on the error. In addition, we derive closed error formulae that allow to determine optimal parameter choices in four practical settings.We apply our analysis to show that a few bits of precision can be saved in the floating-point division (FP-DIV) micro-architecture of the AMD-K7TM microprocessor. These reductions in precision apply to the initial approximation and to the lengths of the multiplicands in the multiplier. When translated to cost, the reductions reflect a savings of 10.6% in the overall cost of the FP-DIV micro-architecture.