UMHexagonS Algorithm Based Motion Estimation Architecture for H.264/AVC

Authors:
Choudhury A. Rahman;Wael Badawy
Affiliations:
University of Calgary;University of Calgary
Venue:
IWSOC '05 Proceedings of the Fifth International Workshop on System-on-Chip for Real-Time Applications
Year:
2005

Citing 0
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Abstract

This paper presents an integer pel variable block motion estimation architecture based on JVT accepted UMHexagonS algorithm for H.264/MPEG-4 Part 10 (AVC) encoder. The proposed pipelined architecture is capable of calculating the required 41 motion vectors of various size blocks supported by H.264/AVC within a 16x16 block in parallel. The architecture can be used for rapid prototyping of motion estimation core using FPGA. The performance analysis shows that the architecture is capable of processing CIF frame sequences in real time considering 5 reference frames within the search range of 卤16 at a clock speed of around 30 MHz.