A new kind of science
A High I/O Reconfigurable Crossbar Switch
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
FPGA-Based Acceleration of the 3D Finite-Difference Time-Domain Method
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Assessing the potential of hybrid hpc systems for scientific applications: a case study
Proceedings of the 4th international conference on Computing frontiers
A High-Performance Event Service for HPC Applications
SE-HPC '07 Proceedings of the 3rd International Workshop on Software Engineering for High Performance Computing Applications
Simulating data processing for an advanced ion mobility mass spectrometer
HPRCTA '07 Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications: held in conjunction with SC07
FPGA acceleration of a quantum Monte Carlo application
Parallel Computing
Hardware-accelerated components for hybrid computing systems
Proceedings of the 2008 compFrame/HPC-GECO workshop on Component based high performance
A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
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Often reconfigurable systems are reported to have 10脳 to 100脳 speedup over that of a software system. However, the reconfigurable hardware must usually be combined with software to form an entire system. This system integration presents a hardware/software co-design problem with many system engineering issues. Here, we present traffic acceleration on the Cray XD1 supercomputer and describe the costs involved in different hardware/software trade-offs.