Hardware-accelerated components for hybrid computing systems

  • Authors:
  • Daniel Chavarría-Miranda;Jarek Nieplocha;Ian Gorton

  • Affiliations:
  • Pacific Northwest National Laboratory;Pacific Northwest National Laboratory;Pacific Northwest National Laboratory

  • Venue:
  • Proceedings of the 2008 compFrame/HPC-GECO workshop on Component based high performance
  • Year:
  • 2008

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Abstract

We present a study on the use of component technology for encapsulating platform-specific hardware-accelerated algorithms on hybrid HPC systems. Our research shows that component technology can have significant benefits from a software engineering point-of-view to increase encapsulation, portability and reduce or eliminate platform dependence for hardware-accelerated algorithms. As a demonstration of this concept, we discuss our experience in designing, implementing and integrating an FPGA-accelerated kernel for Polygraph, an application in computational proteomics.