Developing and Distributing Component-Level VHDL Models
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
VHDL: Toward a Unified View of Design
IEEE Design & Test
A Component Architecture for FPGA-Based, DSP System Design
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Toward a Common Component Architecture for High-Performance Scientific Computing
HPDC '99 Proceedings of the 8th IEEE International Symposium on High Performance Distributed Computing
Self-adapting software for numerical linear algebra and LAPACK for clusters
Parallel Computing - Special issue: Parallel and distributed scientific and engineering computing
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Proceedings of the 2nd conference on Computing frontiers
Partitioning Hardware and Software for Reconfigurable Supercomputing Applications: A Case Study
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
A Component Architecture for High-Performance Scientific Computing
International Journal of High Performance Computing Applications
Assessing the potential of hybrid hpc systems for scientific applications: a case study
Proceedings of the 4th international conference on Computing frontiers
Bocca: a development environment for HPC components
Proceedings of the 2007 symposium on Component and framework technology in high-performance and scientific computing
Exploring weak scalability for FEM calculations on a GPU-enhanced cluster
Parallel Computing
Scientific computing Kernels on the cell processor
International Journal of Parallel Programming
Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays
Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays
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We present a study on the use of component technology for encapsulating platform-specific hardware-accelerated algorithms on hybrid HPC systems. Our research shows that component technology can have significant benefits from a software engineering point-of-view to increase encapsulation, portability and reduce or eliminate platform dependence for hardware-accelerated algorithms. As a demonstration of this concept, we discuss our experience in designing, implementing and integrating an FPGA-accelerated kernel for Polygraph, an application in computational proteomics.