Wire segmenting for improved buffer insertion
DAC '97 Proceedings of the 34th annual Design Automation Conference
Closed form solution to simultaneous buffer insertion/sizing and wire sizing
Proceedings of the 1997 international symposium on Physical design
Greedy wire-sizing is linear time
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An efficient and optimal algorithm for simultaneous buffer and wire sizing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
This paper presents a fundamental result on buffer sizing. Given an interconnection wire with n buffers evenly spaced along the wire, we would like to size all buffers such that the Elmore delay is minimized. It is well known that the problem can be solved by an iterative algorithm which sizes one buffer at a time. However, no closed form solution has ever been reported. In this paper, we derive a closed form buffer sizing function f(x) where f(x) gives the optimal buffer size for the buffer at position x. We show that f(x) can be expressed in terms of the Weierstrass elliptic function ℘(x) and its derivative ℘'(x).