Unifying memory and processor wrapper architecture in multiprocessor SoC design
Proceedings of the 15th international symposium on System Synthesis
Multiprocessor SoC Platforms: A Component-Based Design Approach
IEEE Design & Test
Automatic generation of equivalent architecture model from functional specification
Proceedings of the 41st annual Design Automation Conference
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A mixed-level virtual prototyping environment for SystemC-based design methodology
Microelectronics Journal
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We propose a method of enhancing the reusability of the component IPs by separating communication and computation for a system function. In this approach, we assume that the component designers describe mainly the computation part of the component, and the system designer can construct the communication part by using our refinement-based design environment. Moreover, we introduced a concept of the Communication Architecture Template Tree (CATree), which helps IP designers to effectively separate computation and communication for a system function. We confirmed that this approach is effective by applying it to a H.264 decoder design.