Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning

Authors:
Xiangyuan Liu;Shuming Chen
Affiliations:
National University of Defense Technology, Hunan, P. R. China;National University of Defense Technology, Hunan, P. R. China
Venue:
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Year:
2006

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Abstract

In this paper, we present a lookup table based model for delay and power estimation of low-swing interconnects: LSIEM. It can be used during high-level design planning, synthesis, and simulation of interconnect-centric VDSM designs. LSIEM is an accurate and efficient high-level estimation model. It has been tested on a wide range of parameters and shown to have over 90% accuracy with respect to HSPICE simulation results.