On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
The design and synthesis of a synchronous and distributed MAC protocol for wireless network-on-chip
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Dual-channel binary-countdown medium access control in wireless network-on-chip
Proceedings of the 2nd international conference on Nano-Networks
MTNet: design of a wireless test framework for heterogeneous nanometer systems-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-throughput differentiated service provision router architecture for wireless network-on-chip
International Journal of High Performance Systems Architecture
Surface wave communication system for on-chip and off-chip interconnects
Proceedings of the Fifth International Workshop on Network on Chip Architectures
An Improved Connection Method for Multi-Core SoC
International Journal of Advanced Pervasive and Ubiquitous Computing
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The feasibility of integrating antennas and required circuits to form wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction of transmitted and received signals with nearby circuits appear to be manageable. Besides, on-chip interconnection, this technology can potentially be applied for implementation of true single chip radio and radar, interchip communication systems, RFID tags and others.