Tolerating latency through software-controlled data prefetching
Tolerating latency through software-controlled data prefetching
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Compiler-based prefetching for recursive data structures
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
Active pages: a computation model for intelligent memory
Proceedings of the 25th annual international symposium on Computer architecture
The memory fragmentation problem: solved?
Proceedings of the 1st international symposium on Memory management
Garbage collecting the Internet: a survey of distributed garbage collection
ACM Computing Surveys (CSUR)
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Effective jump-pointer prefetching for linked data structures
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
APRIL: a processor architecture for multiprocessing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Communications of the ACM
Composing high-performance memory allocators
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
High-Performance DRAMs in Workstation Environments
IEEE Transactions on Computers
Operating Systems: A Design-Oriented Approach
Operating Systems: A Design-Oriented Approach
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
IEEE Micro
M32R/D-Integrating DRAM and Microprocessor
IEEE Micro
The Alpha 21264 Microprocessor
IEEE Micro
Effective Hardware-Based Data Prefetching for High-Performance Processors
IEEE Transactions on Computers
Dynamic Storage Allocation: A Survey and Critical Review
IWMM '95 Proceedings of the International Workshop on Memory Management
New methods for dynamic storage allocation (Fast Fits)
SOSP '83 Proceedings of the ninth ACM symposium on Operating systems principles
Feasibility of decoupling memory management from the execution pipeline
Journal of Systems Architecture: the EUROMICRO Journal
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In this work, we show that data-intensive and frequently-used service functions such as memory allocation and deallocation entangle with application's working set and become a major cause for cache misses. We present our technique that transfers the allocation and de-allocation functions' executions from main CPU to a separate processor residing on chip with DRAM (Intelligent Memory Manager). The results manifested in the paper state that, 60% of the cache misses caused by the service functions are eliminated when using our technique. We believe that cache performance of applications in computer system is poor due to their indulgence for the service functions.