Communicating sequential processes
Communicating sequential processes
Implementation of the data-flow synchronous language SIGNAL
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
A Discipline of Programming
Synthesis of operation-centric hardware descriptions
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Interface Theories for Component-Based Design
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
A Protocol for Loosely Time-Triggered Architectures
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Fair Synchronous Transition Systems and Their Liveness Proofs
FTRTFT '98 Proceedings of the 5th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Polychrony for Formal Refinement-Checking in a System-Level Design Methodology
ACSD '03 Proceedings of the Third International Conference on Application of Concurrency to System Design
Proceedings of the 4th ACM international conference on Embedded software
A framework for comparing models of computation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Compositional design of isochronous systems
Proceedings of the conference on Design, automation and test in Europe
A Survey of Desynchronization in a Polychronous Model of Computation
Electronic Notes in Theoretical Computer Science (ENTCS)
The Role of Back-Pressure in Implementing Latency-Insensitive Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Compositional design of isochronous systems
Science of Computer Programming
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The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc system-level design methodologies, that lifts modeling to higher levels of abstraction, and the concept of intellectual property (IP), that promotes reuse of existing components, are essential steps to manage design complexity. However, the issue of compositional correctness arises with these steps. Given components from different manufacturers, designed with heterogeneous models, at different levels of abstraction, assembling them in a correct-by-construction manner is a difficult challenge. We address this challenge by proposing a process algebraic model to support system design with a formal model of computation and serve as a type system to capture the behavior of system components at the interface level. The proposed algebra is conceptually minimal, equipped with a formal semantics defined in a synchronous model of computation. It supports a scalable notion and a flexible degree of abstraction. We demonstrate its benefits by considering the type-based synthesis of latency-insensitive protocols, showing that the synthesis of component wrappers can be optimized by behavioral information carried by interface type descriptions and yield minimized stalls and maximized throughput.