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Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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DATE '00 Proceedings of the conference on Design, automation and test in Europe
Battery-aware static scheduling for distributed real-time embedded systems
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ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Discrete-time battery models for system-level low-power design
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An analytical high-level battery model for use in energy management of portable electronic systems
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Battery-Driven Dynamic Power Management
IEEE Design & Test
iPACE-V1: A Portable Adaptive Computing Engine for Real Time Applications
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
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FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
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Energy Management for Dynamically Reconfigurable Heterogeneous Mobile Systems
IPDPS '01 Proceedings of the 10th Heterogeneous Computing Workshop â"" HCW 2001 (Workshop 1) - Volume 2
Energy management for battery-powered embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Balancing batteries, power, and performance: system issues in cpu speed-setting for mobile computing
Balancing batteries, power, and performance: system issues in cpu speed-setting for mobile computing
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Energy efficient battery management
IEEE Journal on Selected Areas in Communications
Energy budget approximations for battery-powered systems with a fixed schedule of active intervals
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We define portable reconfigurable computing platforms as those which have some form of configurable logic coupled with other on-chip or off-chip processing units such as soft processors, embedded processors, and voltage-scalable processors. In the first part of this paper, we present and test a unique methodology where we dynamically change the active area of a field programmable gate array (FPGA) to vary the battery usage and lifetime of the system, by running it on several different taskgraph structures and report an average of 14% and as high as 21%, less battery capacity used, as compared to nonoptimal execution. In the second part of this paper, we integrate the above methodology with more traditional voltage and frequency scaling techniques for portable systems and present a heuristic iterative algorithm for single and multiple processing units. The iterative heuristic algorithm fnds a sequence of tasks along with an appropriate design point (implementation option) for each task, such that a deadline is met and the amount of battery energy used is as small as possible. We have used several real-world benchmarks to test the effectiveness of this methodology and we will present the results.