Digital filter synthesis based on minimal signed digit representation
Proceedings of the 38th annual Design Automation Conference
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A new algorithm for elimination of common subexpressions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowledge, the method presented in this paper is the only exact algorithm designed for this problem. We present the results of the algorithm on real-sized filter instances and compare with an improved version of a recently proposed exact algorithm designed for the minimization of area. We show that in many cases delay can be minimized without any area penalty. Additionally, we describe two approximate algorithms that can be applied to instances which cannot be solved, or take too long, with the exact algorithm. We show that these algorithms find similar solutions to the exact algorithm in less CPU time.