Scheduling nonuniform traffic in a packet-switching system with small propagation delay
IEEE/ACM Transactions on Networking (TON)
Packet-mode scheduling in input-queued cell-based switches
IEEE/ACM Transactions on Networking (TON)
ATM Input-Buffered Switches with the Guaranteed-Rate Property
ISCC '98 Proceedings of the Third IEEE Symposium on Computers & Communications
Guaranteed scheduling for switches with configuration overhead
IEEE/ACM Transactions on Networking (TON)
SCHEDULING OF AN INPUT-QUEUED SWITCH TO ACHIEVE MAXIMAL THROUGHPUT
Probability in the Engineering and Informational Sciences
Delay bounds for combined input-output switches with low speedup
Performance Evaluation - Internet performance symposium (IPS 2002)
Packet-mode policies for input-queued switches
Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
Work-conserving distributed schedulers for Terabit routers
Proceedings of the 2004 conference on Applications, technologies, architectures, and protocols for computer communications
On the speedup required for combined input- and output-queued switching
Automatica (Journal of IFAC)
Load balanced Birkhoff-von Neumann switches, part I: one-stage buffering
Computer Communications
On the speedup required for work-conserving crossbar switches
IEEE Journal on Selected Areas in Communications
On scheduling optical packet switches with reconfiguration delay
IEEE Journal on Selected Areas in Communications
Packet mode and QoS algorithms for buffered crossbar switches with FIFO queuing
Proceedings of the twenty-seventh ACM symposium on Principles of distributed computing
On the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing
DISC '08 Proceedings of the 22nd international symposium on Distributed Computing
Strong performance guarantees for asynchronous buffered crossbar scheduler
IEEE/ACM Transactions on Networking (TON)
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Most common network protocols (e.g., the Internet Protocol) work with variable size packets, whereas contemporary switches still operate with fixed size cells, which are easier to transmit and buffer. This necessitates packet segmentation and reassembly modules, resulting in significant computation and communication overhead that might be too costly as switches become faster and bigger. It is therefore imperative to investigate an alternative mode of scheduling, in which packets are scheduled contiguously over the switch fabric.This paper investigates the cost of packet-mode scheduling for the combined input output queued (CIOQ) switch architecture.We devise frame-based schedulers that allow a packetmode CIOQ switch with small speedup to mimic an ideal output-queued switch with bounded relative queuing delay. The schedulers are pipelined and are based on matrix decomposition.Our schedulers demonstrate a trade-off between the switch speedup and the relative queuing delay incurred while mimicking an output-queued switch. When the switch is allowed to incur high relative queuing delay, a speedup arbitrarily close to 2 suffices to mimic an ideal output-queued switch. This implies that packet-mode scheduling does not require higher speedup than a cell-based scheduler. The relative queuing delay can be significantly reduced with just a doubling of the speedup. We further show that it is impossible to achieve zero relative queuing delay (that is, a perfect emulation), regardless of the switch speedup.Finally, we show that a speedup arbitrarily close to 1 suffices to mimic an output-queued switch with a bounded buffer size.