Data structures and network algorithms
Data structures and network algorithms
High-performance multi-queue buffers for VLSI communications switches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
Two-dimensional round-robin schedulers for packet switches with multiple input queues
IEEE/ACM Transactions on Networking (TON)
Scheduling algorithms for input-queued cell switches
Scheduling algorithms for input-queued cell switches
IEEE/ACM Transactions on Networking (TON)
A quantitive comparision of iterative scheduling algoithm for input-queued switches
Computer Networks and ISDN Systems
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Tiny Tera: A Packet Switch Core
IEEE Micro
A High-Performance OC-12/OC-48 Queue Design Prototype for Input-buffered ATM Switches
INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
ATM Input-Buffered Switches with the Guaranteed-Rate Property
ISCC '98 Proceedings of the Third IEEE Symposium on Computers & Communications
Packet-mode emulation of output-queued switches
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures
Throughput Region of Finite-Buffered Networks
IEEE Transactions on Parallel and Distributed Systems
A New Cost-Effective Technique for QoS Support in Clusters
IEEE Transactions on Parallel and Distributed Systems
Optimization of the Switches in Storage Networks
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part III: ICCS 2007
Parallel switch system with QoS guarantee for real-time traffic
Journal of Computer Science and Technology
Strong performance guarantees for asynchronous buffered crossbar scheduler
IEEE/ACM Transactions on Networking (TON)
Performance evaluation of new scheduling methods for the RR/RR CICQ switch
Computer Communications
SPF: to improve the performance of packet-mode scheduling
Computer Communications
Packet-mode asynchronous scheduling algorithm for partially buffered crossbar switches
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
Preemptive packet-mode scheduling to improve TCP performance
IWQoS'05 Proceedings of the 13th international conference on Quality of Service
Packet-Mode priority scheduling for terabit core routers
ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
Efficient approach to merge and segment IP packets
ICCNMC'05 Proceedings of the Third international conference on Networking and Mobile Computing
On the interaction between TCP-like sources and throughput-efficient scheduling policies
Performance Evaluation
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We consider input-queued switch architectures dealing at their interfaces with variable-size packets, but internally operating on fixed-size cells. Packets are segmented into cells at input ports, transferred through the switching fabric, and reassembled at output ports. Cell transfers are controlled by a scheduling algorithm, which operates in packet-mode: all cells belonging to the same packet are transferred from inputs to outputs without interruption. We prove that input-queued switches using packet-mode scheduling can achieve 100% throughput, and we show by simulation that, depending on the packet size distribution, packet-mode scheduling may provide advantages over cell-mode scheduling.