VLSI Implementation of low-power high-quality color interpolation processor for CCD camera

Authors:
Shih-Chang Hsia;Ming-Huei Chen;Po-Shien Tsai
Affiliations:
Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology, Kaohsiung, Taiwan, R.O.C.;Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology, Kaohsiung, Taiwan, R.O.C.;Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology, Kaohsiung, Taiwan, R.O.C.
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2006

Citing 7
Cited 4

Digital video processing

Digital video processing
DSPs for image and video processing

Signal Processing
Color Processing in Digital Cameras

IEEE Micro
A new digital signal processor for progressive scan CCD

IEEE Transactions on Consumer Electronics
Digital still cameras

IEEE Transactions on Consumer Electronics
Demosaicing: image reconstruction from color CCD samples

IEEE Transactions on Image Processing
Effective color interpolation in CCD color filter arrays using signal correlation

IEEE Transactions on Circuits and Systems for Video Technology

Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering

Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Design methodology for low power and parametric robustness through output-quality modulation: application to color-interpolation filtering

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pixel cross-talk compensation for CMOS image sensors

IITA'09 Proceedings of the 3rd international conference on Intelligent information technology application
Use of wavelet for image processing in smart cameras with low hardware resources

Journal of Systems Architecture: the EUROMICRO Journal

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper presents a color interpolation technique for a single-chip charge-coupled device with color-filter-array format. We propose edge-direction weighting and the local gain approach to reconstruct missing color components. Simulations show that the proposed method can achieve better quality-complexity tradeoff than other algorithms. For real-time implementation, a cost-effective architecture consisting of a pipeline schedule is designed based on our new algorithm. With the time-sharing method, the VLSI architecture can interpolate various colors using a common computational kernel, reducing the circuit complexity. The prototype of the color interpolation processor has been successfully verified with a field-programmable gate array device. The chip only uses about 10K gates and two line buffers.