A Tutorial on Using PVS for Hardware Verification
TPCD '94 Proceedings of the Second International Conference on Theorem Provers in Circuit Design - Theory, Practice and Experience
Mechanizing Verification of Arithmetic Circuits: SRT Division
Proceedings of the 17th Conference on Foundations of Software Technology and Theoretical Computer Science
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Formal Verification of a Complex Pipelined Processor
Formal Methods in System Design
Configware and morphware going mainstream
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Journal of Functional Programming
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Operation-centric hardware description and synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A PVS Theory for Term Rewriting Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
A Formalization of the Knuth---Bendix(---Huet) Critical Pair Theorem
Journal of Automated Reasoning
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Rewriting and Rewriting-Logic have been used in several applications, including specification, formal verification and construction of proof assistants. Previous works explored hardware specification and modeling using the rewriting-logic system ELA. Experiences proved this to be very effective, but certainly restricted as a tool for formal verification of the correctness of the given hardware specifications. Although simple, verification had to be done exhaustively and manually, which indicated the need of automating this process. We present SAEPTUM, a methodology and tool for the verification of rewrite specifications created in ELAN, via the translation to the proof assistant PVS and automatic generation of critical pair based correction criteria.