Feature extraction using reconfigurable hardware
ICCVG'10 Proceedings of the 2010 international conference on Computer vision and graphics: Part II
FPGA-based architecture for the real-time computation of 2-D convolution with large kernel size
Journal of Systems Architecture: the EUROMICRO Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We propose a run-time re-configurable parametric architecture (Fabric) for local neighborhood image processing. The proposed architecture is composed of polymorphous cells where each cell accesses neighborhood data from a local cell memory, and executes a neighborhood function sequentially. The architecture is flexible since different neighborhood functions can be implemented by rewriting a cell's software micro-code. High throughput is achieved because many cells execute concurrently. We show that for a satellite image feature extraction application, our architecture, implemented on Stratix II and Virtex 2 Field Programmable Gate Arrays, achieves similar performance, hardware resource utilization, and throughput as a fully pipelined systolic array architecture, yet offers improved flexibility to the developer. We compare and contrast these two architectures for their usability to the image processing community.