Efficient shuffle network architecture and application for WiMAX LDPC decoders
IEEE Transactions on Circuits and Systems II: Express Briefs
Design of a multimode QC-LDPC decoder based on shift-routing network
IEEE Transactions on Circuits and Systems II: Express Briefs
Low-complexity switch network for reconfigurable LDPC decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A multimode shuffled iterative decoder architecture for high-rate RS-LDPC codes
IEEE Transactions on Circuits and Systems Part I: Regular Papers
QSN: a simple circular-shift network for reconfigurable quasi-cyclic LDPC decoders
IEEE Transactions on Circuits and Systems II: Express Briefs
Flexible LDPC decoder architectures
VLSI Design - Special issue on Flexible Radio Design: Trends and Challenges in Digital Baseband Implementation
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For some time now, configurable computing has been hailed as the future for application-specific architectures. The purported advantages are well-known: the increasing NRE cost of chip fab is avoided, the same platform can be used for a variety of applications, ...