Model and Design of Bipolar and Mos Current-Mode Logic: CML, Ecl and Scl Digital Circuits

A generic standard cell design methodology for differential circuit styles

Proceedings of the conference on Design, automation and test in Europe

A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions

CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems

Design and analysis of ultra low power true single phase clock CMOS 2/3 prescaler

IEEE Transactions on Circuits and Systems Part I: Regular Papers

A novel low voltage very low power CMOS class AB current output stage with ultra high output current drive capability

Microelectronics Journal

Low-power tri-state buffer in MOS current mode logic

Analog Integrated Circuits and Signal Processing