Numerical algorithms with C
Global harmony: coupled noise analysis for full-chip RC interconnect networks
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Determination of worst-case aggressor alignment for delay calculation
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On switch factor based analysis of coupled RC interconnects
Proceedings of the 37th Annual Design Automation Conference
ClariNet: a noise analysis tool for deep submicron design
Proceedings of the 37th Annual Design Automation Conference
TACO: timing analysis with coupling
Proceedings of the 37th Annual Design Automation Conference
Timing analysis with crosstalk as fixpoints on complete lattice
Proceedings of the 38th annual Design Automation Conference
Switching window computation for static timing analysis in presence of crosstalk noise
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Hi-index | 2.88 |
Proper modeling of switching windows leads to a better estimate of the noise-induced delay variations. In this paper, we propose a new non-iterative continuous switching model. The proposed new model employs an ordering technique combined with the principle of superposition of linear circuits. The principle of superposition considers the impact of aggressors one after the other. The ordering technique avoids convergence and multiple solution issues in many practical cases. Our model surpasses the accuracy of the traditional discrete model and the speed of fixed point iteration method.