Secure IP downloading for SRAM FPGAs

Authors:
J. Castillo;P. Huerta;J. I. Martínez
Affiliations:
DIET, DAC, Universidad Rey Juan Carlos, Dep. II, D. 157, C/ Tulipan S/N, Móstoles, Spain;DIET, DAC, Universidad Rey Juan Carlos, Dep. II, D. 157, C/ Tulipan S/N, Móstoles, Spain;DIET, DAC, Universidad Rey Juan Carlos, Dep. II, D. 157, C/ Tulipan S/N, Móstoles, Spain
Venue:
Microprocessors & Microsystems
Year:
2007

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Abstract

Nowadays there is a growing number of systems based on FPGAs spread over wide areas. When these kind of systems are used, serious security problems may appear. The configuration data for these devices can be very sensitive information that has to be protected against piracy and reverse engineering. In this paper, the main target is to describe a rapid prototyping platform that allows Secure IP downloading and Rights Management. This platform is based on the possibility offered by the new FPGA families for reprogramming part of the device while the rest is working. This work shows how an FPGA system based on an Open Source OpenRISC 1200 microprocessor takes advantage of this feature to perform the Secure Download of the software and the hardware needed to run a User Application. The platform includes digital signature schemes, symmetric encryption and hashing functions to increment the security. An IP rights management method using this architecture is also presented.